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EISA -VME Bus Interface

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EISA-Bus Extender Feasibility Study

In the late 80s and early 90s, a group of IBM-PC clone manufacturers, including Compaq and Hewlett-Packard, among others, defined an extended ISA bus that included a 32-bit data bus and very fast DMA capabilities. This bus was named EISA (for what else, Extended ISA). This bus was built into machines for a few years, but never became a major player. By the mid-90s, PCI had driven EISA pretty well into oblivion.

I had designed an EISA-VME Bus Interface for a client, who specialized in Bus-to-Bus-Bridges and Bus Extenders. Shortly after my EISA board development project, my client was asked to develop an EISA Extender. Bus Extenders are used to provide more slots for peripheral cards than are available in a normal backplane. The size of a backplane and the number of cards that can be plugged into it are limited by electrical issues. A bus extender consists of two cards, one plugged into the main backplane and the other plugged into a physically separate backplane, although the secondary backplane is usually located close to the primary. A cable connects the two Bus Extender cards. If the bus extender is truly transparent, then every card in the secondary backplane may be accessed just as if they were plugged into the primary backplane. Furthermore, the timing of the bus cycles to access the secondary backplane do not violate the specifications for the bus, although the secondary cycles need not be as fast.

Since I was up to speed on EISA bus design, my client asked me to analyze the design of an EISA-EISA Bus Extender to see if it was possible. Essentially, I performed a preliminary functional design and then analyzed the timing. The key to an extender is the round-trip delay in the connecting cable and interface drivers/receivers, and I assumed a realistic time as the basis for my analysis. I made progress through the first set of programmed I/O bus cycles, and I figured out a way to handle interrupts. But when I got into some of the DMA and bus master protocols, I found that it was impossible to meet all of the EISA specifications even with some creative design concepts. I wrote my findings as I went along, and when my client saw my analysis of the bus master and DMA timing, they agreed that a fully functional EISA Extender was not feasible.

It is interesting to note that at that time, there was a company advertising an EISA-Extender, but based on my analysis we decided it could not meet the full EISA specification. This turned out to be the case.

My client abandoned the idea of developing an EISA Extender based on this preliminary study.

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